A variety of semiconductor chip packages are known. One conventional package configuration includes a leadframe (LF) having at least one die pad for mounting a die or other devices and wire bond pads. Laminate devices, which may include laminate components such as transformers or high voltage (HV) capacitors, may be attached to LFs, such as for certain digital isolation devices.
LF designs for laminate containing packages often include pedestals to physically support the laminate component. In order to enhance the functionality of the laminate component, the clearance (or minimum distance) between the metal layers of the laminate component and the closest LF structure, is typically a package design consideration due to potential electric field interactions that can damage dielectric materials located between the laminate component and the LF.
This clearance can be reduced through pedestal area miniaturization so that the feature size in the metal layers of the laminate component can be increased, which improves the performance of the laminate component. However, this comes with a tradeoff where the laminate components would have less surface area on the pedestals to adhere to, and uncured die attach (DA) material generally does not have sufficient tackiness to properly hold the laminate component in place after laminate component mounting but before its DA material cure. Laminate components have been found to come off or otherwise be displaced during the physical transportation of LF strips from the device mounting tool to the DA cure processing tool (e.g., an oven), resulting in scrapped semiconductor packages, including sometimes scrapping all the in-process devices on the entire LF strip.